july 1998 ? n dip8 (plastic package) d so8 (plastic micropackage) 1 2 3 45 6 7 8 1 - gnd 2 - trigger 3 - output 4 - reset 5 - control voltage 6 - threshold 7 - discharge 8 - v cc pin connections (top view) . low turn off time . maximum operating frequency greater than 500khz . timing from microseconds to hours . operates in both astable and monostable modes . high output current can source or sink 200ma . adjustable duty cycle . ttl compatible . temperature stability of 0.005% per o c order codes part number temperature range package nd ne555 0 o c, 70 o c sa555 C40 o c, 105 o c se555 C55 o c, 125 o c description the ne555 monolithic timing circuit is a highly stable controller capable of producing accurate time delays or oscillation. in the time delay mode of operation, the time is precisely controlled by one external re- sistor and capacitor. for a stable operation as an os- cillator, the free running frequency and the duty cy- cle are both accurately controlled with two external resistors and one capacitor. the circuit may be trig- gered and reset on falling waveforms, and the out- put structure can source or sink up to 200ma. the ne555 is available in plastic and ceramic minidip package and in a 8-lead micropackage and in metal can package version. ne555 sa555 - se555 general purpose single bipolar timers 1/10
threshold comp 5k w 5k w 5k w trigger r flip-flop s q discharge out inhibit/ reset reset comp s - 8086 s + control voltage v cc block diagram output control voltage threshold comparator v cc r1 4.7k w r2 830 w q5 q6 q7 q8 q9 r3 4.7k w r4 1k w r8 5k w q1 q2 q3 q4 q10 q11 q12 q13 threshold trigger reset discharge g n d 2 4 7 1 q14 q15 r5 10k w r6 100k w r7 100k w r10 5k w q17 q16 q18 r9 5k w d2 r16 100 w r15 4.7k w r14 220 w q24 q23 r17 4.7k w 3 q22 r13 d1 q19 q20 q21 r12 6.8k w 5 trigger comparator flip flop r11 5k w 3.9k w schematic diagram absolute maximum ratings symbol parameter value unit v cc supply voltage 18 v t oper operating free air temperature range for ne555 for sa555 for se555 0 to 70 C40 to 105 C55 to 125 o c t j junction temperature 150 o c t stg storage temperature range C65 to 150 o c ne555/sa555/se555 2/10
electrical characteristics t amb = +25 o c, v cc = +5v to +15v (unless otherwise specified) symbol parameter se555 ne555 - sa555 unit min. typ. max. min. typ. max. i cc supply current (r l ) (- note 1) low state v cc = +5v v cc = +15v high state v cc = 5v 3 10 2 5 12 3 10 2 6 15 ma timing error (monostable) (r a = 2k to 100k w , c = 0.1 m f) initial accuracy - (note 2) drift with temperature drift with supply voltage 0.5 30 0.05 2 100 0.2 1 50 0.1 3 0.5 % ppm/ c %/v timing error (astable) (r a , r b = 1k w to 100k w , c = 0.1 m f, v cc = +15v) initial accuracy - (note 2) drift with temperature drift with supply voltage 1.5 90 0.15 2.25 150 0.3 % ppm/ c %/v v cl control voltage level v cc = +15v v cc = +5v 9.6 2.9 10 3.33 10.4 3.8 9 2.6 10 3.33 11 4 v v th threshold voltage v cc = +15v v cc = +5v 9.4 2.7 10 3.33 10.6 4 8.8 2.4 10 3.33 11.2 4.2 v i th threshold current - (note 3) 0.1 0.25 0.1 0.25 m a v trig trigger voltage v cc = +15v v cc = +5v 4.8 1.45 5 1.67 5.2 1.9 4.5 1.1 5 1.67 5.6 2.2 v i trig trigger current (v trig = 0v) 0.5 0.9 0.5 2.0 m a v reset reset voltage - (note 4) 0.4 0.7 1 0.4 0.7 1 v i reset reset current v reset = +0.4v v reset = 0v 0.1 0.4 0.4 1 0.1 0.4 0.4 1.5 ma v ol low level output voltage v cc = +15v, i o(sink) = 10ma i o(sink) = 50ma i o(sink) = 100ma i o(sink) = 200ma v cc = +5v, i o(sink) = 8ma i o(sink) = 5ma 0.1 0.4 2 2.5 0.1 0.05 0.15 0.5 2.2 0.25 0.2 0.1 0.4 2 2.5 0.3 0.25 0.25 0.75 2.5 0.4 0.35 v v oh high level output voltage v cc = +15v, i o(source) = 200ma i o(source) = 100ma v cc = +5v, i o(source) = 100ma 13 3 12.5 13.3 3.3 12.75 2.75 12.5 13.3 3.3 v notes : 1. supply current when output is high is typically 1ma less. 2. tested at v cc = +5v and v cc = +15v. 3. this will determine the maximum value of r a + r b for +15v operation the max total is r = 20m w and for 5v operation the max total r = 3.5m w . operating conditions symbol parameter se555 ne555 - sa555 unit v cc supply voltage 4.5 to 18 4.5 to 18 v v th , v trig , v cl , v reset maximum input voltage v cc v cc v ne555/sa555/se555 3/10
electrical characteristics (continued) symbol parameter se555 ne555 - sa555 unit min. typ. max. min. typ. max. i dis(off) discharge pin leakage current (output high) (v dis = 10v) 20 100 20 100 na v dis(sat) discharge pin saturation voltage (output low) - (note 5) v cc = +15v, i dis = 15ma v cc = +5v, i dis = 4.5ma 180 80 480 200 180 80 480 200 mv t r t f output rise time output fall time 100 100 200 200 100 100 300 300 ns t off turn off time - (note 6) (v reset = v cc ) 0.5 0.5 m s notes : 5. no protection against excessive pin 7 current is necessary, providing the package dissipation rating will not be exceeded. 6. time mesaured from a positive going input pulse from 0 to 0.8x v cc into the threshold to the drop from high to low of the output trigger is tied to treshold. figure 1 : minimum pulse width required for trigering figure 2 : supply current versus supply voltage figure 3 : delay time versus temperature figure 4 : low output voltage versus output sink current ne555/sa555/se555 4/10
figure 5 : low output voltage versus output sink current figure 6 : low output voltage versus output sink current figure 7 : high output voltage drop versus output figure 8 : delay time versus supply voltage figure 9 : propagation delay versus voltage level of trigger value ne555/sa555/se555 5/10
capacitor voltage = 2.0v/div t = 0.1 ms / div input = 2.0v/div output voltage = 5.0v/div r1 = 9.1k w , c1 = 0.01 m f, r = 1k w l figure 11 reset trigger output r1 c1 control voltage 0.01 m f ne555 = 5 to 15v v cc 4 2 3 1 5 6 7 8 figure 10 c ( m f) 10 1.0 0.1 0.01 0.001 10 100 1.0 10 100 10 (t ) d m s m s ms ms ms s 10m w 1m w 1 00 k w 10k w r1 = 1k w figure 12 application information monostable operation in the monostable mode, the timer functions as a one-shot. referring to figure 10 the external capaci- tor is initially held discharged by a transistor inside the timer. the circuit triggers on a negative-going input signal when the level reaches 1/3 vcc. once triggered, the circuit remains in this state until the set time has elapsed, even if it is triggered again during this in- terval. the duration of the output high state is given by t = 1.1 r 1 c 1 and is easily determined by figure 12. notice that since the charge rate and the threshold level of the comparator are both directly proportional to supply voltage, the timing interval is independent of supply. applying a negative pulse simultaneously to the reset terminal (pin 4) and the trigger terminal (pin 2) during the timing cycle discharges the exter- nal capacitor and causes the cycle to start over. the timing cycle now starts on the positive edge of the reset pulse. during the time the reset pulse in ap- plied, the output is driven to its low state. when a negative trigger pulse is applied to pin 2, the flip-flop is set, releasing the short circuit across the external capacitor and driving the output high. the voltage across the capacitor increases exponen- tially with the time constant t = r 1 c 1 . when the volt- age across the capacitor equals 2/3 v cc , the compa- rator resets the flip-flop which then discharge the ca- pacitor rapidly and drivers the output to its low state. figure 11 shows the actual waveforms generated in this mode of operation. when reset is not used, it should be tied high to avoid any possibly or false triggering. astable operation when the circuit is connected as shown in figure 13 (pin 2 and 6 connected) it triggers itself and free runs as a multivibrator. the external capacitor charges through r 1 and r 2 and discharges through r 2 only. thus the duty cycle may be precisely set by the ratio of these two resistors. in the astable mode of operation, c 1 charges and discharges between 1/3 v cc and 2/3 vcc. as in the triggered mode, the charge and discharge times and therefore frequency are independent of the supply voltage. ne555/sa555/se555 6/10
t = 0.5 ms / div output voltage = 5.0v/div capacitor voltage = 1.0v/div r1 = r2 = 4.8k w , c1= 0.1 m f, r = 1k w l figure 14 c ( m f) 10 1.0 0.1 0.01 0.001 0.1 1 10 100 1k 10k f (hz) o 1 m w r 1 + r 2 = 1 0 m w 1 0 0 k w 1 0 k w 1 k w figure 15 : free running frequency versus r 1 , r 2 and c 1 figure 14 shows actual waveforms generated in this mode of operation. the charge time (output high) is given by : t 1 = 0.693 (r 1 + r 2 ) c 1 and the discharge time (output low) by : t 2 = 0.693 (r 2 ) c 1 thus the total period t is given by : t = t 1 + t 2 = 0.693 (r 1 + 2r 2 ) c 1 the frequency ofoscillation is them : f = 1 t = 1.44 ( r 1 + 2r 2 ) c 1 and may be easily found by figure 15. the duty cycle is given by : d = r 2 r 1 + 2r 2 output 3 4 8 7 5 1 r1 c1 2 6 r2 control voltage ne555 v cc = 5 to 15v 0.01 m f figure 13 pulse width modulator when the timer is connected in the monostable mode and triggered with a continuous pulse train, the output pulse width can be modulated by a signal applied to pin 5. figure 16 shows the circuit. trigger output r c ne555 2 4 3 1 5 6 7 modulation input 8 a v cc figure 16 : pulse width modulator. ne555/sa555/se555 7/10
linear ramp when the pullup resistor, r a , in the monostable cir- cuit is replaced by a constant current source, a linear ramp is generated. figure 17 shows a circuit con- figuration that will perform this function. trigger output c ne555 2 4 3 1 5 6 7 8 e v cc 0.01 m f r2 r1 r 2n4250 or equiv. figure 17. out r a c ne55 2 4 3 1 5 6 7 8 v cc 51k w r b 22k w 0.01 m f v cc 0.01 m f figure 19 : 50% duty cycle oscillator. figure 18 shows waveforms generator by the linear ramp. the time interval is given by : t = ( 2/3 v cc r e ( r 1 + r 2 ) c r 1 v cc - v be ( r 1 + r 2 ) v be = 0.6v figure 18 : linear ramp. v cc = 5v top trace : input 3v/div time = 20 m s/div middle trace : output 5v/div r 1 = 47k w bottom trace : output 5v/div r 2 = 100k w bottom trace : capacitor voltage r e = 2.7k w 1v/div c = 0.01 m f 50% duty cycle oscillator for a 50% duty cycle the resistors r a and r e may be connected as in figure 19. the time preriod for the output high is the same as previous, t 1 = 0.693 r a c. for the output low it is t 2 = [ ( r a r b ) ( r a + r b ) ] cln ? r b - 2r a 2r b - r a ? thus the frequency of oscillation is f = 1 t 1 + t 2 note that this circuit will not oscillate if r b is greater than 1/2 r a because the junction of r a and r b can- not bring pin 2 down to 1/3 v cc and trigger the lower comparator. additional information adequate power supply bypassing is necessary to protect associated circuitry. minimum recom- mended is 0.1 m f in parallel with 1 m f electrolytic. ne555/sa555/se555 8/10
pm-dip8.eps package mechanical data 8 pins - plastic dip dimensions millimeters inches min. typ. max. min. typ. max. a 3.32 0.131 a1 0.51 0.020 b 1.15 1.65 0.045 0.065 b 0.356 0.55 0.014 0.022 b1 0.204 0.304 0.008 0.012 d 10.92 0.430 e 7.95 9.75 0.313 0.384 e 2.54 0.100 e3 7.62 0.300 e4 7.62 0.300 f 6.6 0260 i 5.08 0.200 l 3.18 3.81 0.125 0.150 z 1.52 0.060 dip8.tbl ne555/sa555/se555 9/10
pm-so8.eps package mechanical data 8 pins - plastic micropackage (so) dimensions millimeters inches min. typ. max. min. typ. max. a 1.75 0.069 a1 0.1 0.25 0.004 0.010 a2 1.65 0.065 a3 0.65 0.85 0.026 0.033 b 0.35 0.48 0.014 0.019 b1 0.19 0.25 0.007 0.010 c 0.25 0.5 0.010 0.020 c1 45 o (typ.) d 4.8 5.0 0.189 0.197 e 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 3.81 0.150 f 3.8 4.0 0.150 0.157 l 0.4 1.27 0.016 0.050 m 0.6 0.024 s8 o (max.) so8.tbl information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specif i- cations mentioned in this publication are subject to change without notice. this publication supersedes and replaces all infor- mation previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectronics. ? the st logo is a trademark of stmi croelectronics ? 1998 stmi croelectronics C printed in italy C all rights reserved stmicroelectronics group of companies australia - brazil - canada - china - france - germany - italy - japan - korea - malaysia - malta - mexico - morocco the netherlands - singapore - spain - sweden - switzerland - taiwan - thailand - united kingdom - u.s.a. order code : ne555/sa555/se555 10/10
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